Developing tests for your designs can take much more time and more code than the original models. ... All the code for the 8-bit adders requires only 33 lines of Verilog. ... The test bench for the alu model in Chapter 10, which is compact and uses an external data file, may need even more code than some implementations anbsp;...
|Title||:||VLSI Design Theory and Practice|
|Publisher||:||Laxmi Publications - 2013|