January 4-7, 1997, Hyderabad, India ... The partial scan flip-flop selection problem in a sequential circuit is a fundamental problem in testing and has ... various partial scan selection techniques refer to August/October 1995 issue of Journal of Electronic Testing (JETTA). ... This information is typically available at the start of the modular design process, for example the top level block diagram of the design.
|Title||:||Tenth International Conference on VLSI Design|
|Publisher||:||IEEE Computer Society - 1997-01-01|