System Level ESD Co-Design

System Level ESD Co-Design

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An effective and cost efficient protection of electronic system against ESD stress pulses specified by IEC 61000-4-2 is paramount for any system design. This pioneering book presents the collective knowledge of system designers and system testing experts and state-of-the-art techniques for achieving efficient system-level ESD protection, with minimum impact on the system performance. All categories of system failures ranging from a€˜harda€™ to a€˜softa€™ types are considered to review simulation and tool applications that can be used. The principal focus of System Level ESD Co-Design is defining and establishing the importance of co-design efforts from both IC supplier and system builder perspectives. ESD designers often face challenges in meeting customers' system-level ESD requirements and, therefore, a clear understanding of the techniques presented here will facilitate effective simulation approaches leading to better solutions without compromising system performance. With contributions from nine distinguished experts, readers benefit from hands-on experience and in-depth knowledge in topics ranging from ESD design and the physics of system ESD phenomena to tools and techniques to address soft failures and strategies to design ESD-robust systems that include mobile and automotive applications. The first dedicated resource to system-level ESD co-design, this is an essential reference for industry ESD designers, system builders, IC suppliers and customers and also Original Equipment Manufacturers (OEMs). Key features: a€c Clarifies the concept of system level ESD protection. a€c Introduces a co-design approach for ESD robust systems. a€c Details soft and hard ESD fail mechanisms. a€c Detailed protection strategies for both mobile and automotive applications. a€c Explains simulation tools and methodology for system level ESD co-design and overviews available test methods and standards. a€c Highlights economic benefits of system ESD co-design.A TVS device must be appropriate for the normal voltage range of the circuit node being protected. A primary characteristic ... The eye diagram is commonly used to demonstrate a protection devicea#39;s high-speed properties. In an eye diagram aanbsp;...

Title:System Level ESD Co-Design
Author:Charvaka Duvvury, Harald Gossner
Publisher:John Wiley & Sons - 2015-05-18


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