This paper demonstrates a proof of concept design that offers a viable solution to perform probe metrology in-line with wafer-level circuit testing. A versatile circuit was designed and laid out that promises fine accuracy resolution of 3.21 mum, and fast test time of 1.25 ms per probe.2.2.1 Manual Inspection Manual effort is removed from the flow as much as possible in the interest of efficiency. However, there are always instances in which probe card analyzers do not provide sufficient information and a probe engineer hasanbsp;...
|Title||:||On-chip Probe Metrology|
|Author||:||William Robert Farner|
|Publisher||:||ProQuest - 2008|