HW/SW Co-Design for Heterogeneous Multi-Core Platforms describes the results and outcome of the FP6 project which focuses on the development of an integrated tool chain targeting a heterogeneous multi core platform comprising of a general purpose processor (ARM or powerPC), a DSP (the diopsis) and an FPGA. The tool chain takes existing source code and proposes transformations and mappings such that legacy code can easily be ported to a modern, multi-core platform. Downloadable software will be provided for simulation purposes.The xml file is transformed in a text file (*.cfg) that is more suitable for processing by the VHDL Generator. The last block in ... VHDL code. As an example of what is described in this library, consider the floating point division of two variables in c code ... There is not support for 64-bit data types, multidimensional arrays andanbsp;...
|Title||:||Hardware/Software Co-design for Heterogeneous Multi-core Platforms|
|Publisher||:||Springer Science & Business Media - 2012-02-02|