with applications to processors and memory design Mohamed I. Elmasry, IEEE Solid-State Circuits Council ... The influence of device dimensions upon the inverter delay time is also investigated. ... 1 with the capacitors defined as Ct = CL + alt;Cdb3agt; + alt;Cgd3agt; + alt;Cv2agt; + alt;Ca2agt; (1) Cfcl = Cg4 + alt;Cfl, 2agt; + Cgdl + alt;Cib\agt; + Cgj\ .
|Title||:||Digital MOS integrated circuits II|
|Author||:||Mohamed I. Elmasry, IEEE Solid-State Circuits Council|
|Publisher||:||IEEE - 1992|