Correct Hardware Design and Verification Methods

Correct Hardware Design and Verification Methods

4.11 - 1251 ratings - Source

Thisvolumeconstitutestheproceedingsofthe2005 Advanced Research Working C- ference on Correct Hardware-like Design and Veri?cation Methods. CHARME 2005 washeldattheVictor'sResidenz-Hotel, Saarbruck ] en, Germany, 3-6October2005. CHARME2005wasthethirteenthinaseriesofworkingconferencesdevotedtothe developmentandtheuseofleading-edgeformaltechniquesandtoolsforthespeci?- tion, design and veri?cationof hardwareand hardware-likesystems. Previousconf- encesundertheCHARMEnamehavebeenheldinTurin(1991), Arles(1993), Fra- furt (1995), Montreal (1997), Bad Herrenalb (1999), Edinburgh (2001) and L'Aquila (2003).Prioreventsintheserieswerestartedintheearlydaysofformalhardwarev- i?cation, and wereheld undervariousnamesin Darmstadt (1984), Edinburgh(1985), Grenoble(1986), Glasgow (1988), and Leuven(1989).It is nowwell established that CHARMEtakesplaceonodd-numberedyears, androtatesprimarilyinEurope.Itisthe biennialcounterpartofitssisterconferenceFMCAD, whichhastakenplaceeveryeven yearintheUSAsince1996. CHARME 2005 was sponsored by the IFIP TC10/WG10.5 Working Group on Design and Engineering of Electronic Systems and its Special Interest Group SIG- CHARME. It was organized by the Computer Science Department of Saarland University. Thisyear, twokindsofcontributionsweresolicited: (i)fullpapers, describingor- inalresearchwork, intendedforanoralplenarypresentation, (ii)shortpapers, descr- ingongoinglessmatureresearchworkintendedforpresentationaspostersorresearch prototypedemonstrations. Two very long sessions were allocated to poster and int- active presentations, with the aim of giving an emphasis on the qworkingq aspect of the working conference, where discussion of new or un?nished results and feedback are an essential aspect of the event.The community was extremely responsiveto this viewpoint: we received a total number of 79 submitted papers, out of which 21 long contributionsand 18 short contributionswere accepted for presentationat the conf- enceandinclusioninthisvolume.Allpapersreceivedaminimumofthreereviews. For the conferenceprogram outside the refereed talks we put emphasis on the - latedtopicsoftoolintegrationandpervasivesystemveri?cation.Thedayprecedingthe workingconferencefeaturedhands-ondemonstrationsfornumerousveri?cationtools; italsofeaturedatutorialonsystemveri?cationbymembersoftheVerisoftproject.The overall program of CHARME 2005 included an invited keynote address by Wolfram B] uttner on industrial processor veri?cation and a round table discussion about mixed techniquesforverylargehardware-softwaresystemsinitiatedwithaninvitedpresen- tionbyMasaharuImaiandAkiraKitajima. A quality conference such as CHARME results from the work of many people. We wish to thank the membersof the ProgramCommittee and the externalreviewers fortheirhardworkinevaluatingthesubmissionsandinselectinghighqualitypapers.qCRC computes a 32-bit cyclic redundancy code. BPB is a branch prediction buffer. S1269 is an 8-bit ALU. Rotator and Spinner are barrel shifters sandwiched between registers. B04 is a Verilog translation of the original b04 circuit from the anbsp;...

Title:Correct Hardware Design and Verification Methods
Author:Dominique Borrione, Wolfgang Paul
Publisher:Springer Science & Business Media - 2005-09-19


You Must CONTINUE and create a free account to access unlimited downloads & streaming