This behavior is modeled by associating t2 a prs memory policy. ... assumed for t\ is completely inin- fluent for the overall behavior of the system as t4 will always complete its activity once enabled. ... The PN model has to enforce the memory reset of transitions alt;2 and t4 in case of processor failure, because, otherwise, the anbsp;...
|Title||:||7th International Workshop on Petri Nets and Performance Models|
|Publisher||:||IEEE - 1997|